Peripheral component interconnect express (PCI-E) is a standard for incorporating peripheral devices in computing systems. The standard defines physical and logical interfaces and protocols for communication with PCI-E compatible devices. PCI-E is commonly used in consumer and industrial applications as a motherboard level interconnect, a passive backplane interconnect, and an expansion card interface.
Through the use of PCI-E switches, a host system or embedded processor can be connected to an arbitrary number of PCI-E compatible peripheral devices in a tree topology. As an example, in a typical PCI-E tree, a host processor is connected to a root complex having one or more PCI-E ports. Each PCI-E port is connected to a peripheral device or a PCI-E switch, and each PCI-E switch is connected to multiple PCI-E slots. The PCI-E slots each receive a peripheral device or a PCI-E cable card connected to another downstream PCI-E switch.
The flexible nature of the tree topology allows end-users and system integrators to customize many aspects of an individual system. However, it can also lead to performance issues such as communication bottlenecks, data collisions, and so on. As an example, suppose a PCI-E switch is connected to multiple slots each having a peripheral device. The peripheral devices must compete with each other for input/output bandwidth of the switch. In addition, the peripheral devices must compete with other peripheral devices for host processor bandwidth. These and other performance issues place practical limitations on the flexibility of the PCI-E standard.
These performance issues also apply to standards based on PCI-E, such as compact PCI-E (cPCI-E), which provides a ruggedized version of PCI-E, and PCI-E eXtensions for instrumentation (PXI-E), which adapts PCI-E for test and measurement applications.
What is needed, therefore, are new techniques and technologies for maintaining both flexibility and performance in systems using PCI-E based interconnections.